Kevin EE's starred repositories
Heart-Rate-and-Pulse-Oximeter
Heart Rate and Pulse Oximeter sensor. a MAXIM HR/SpO2 IC would receive raw data from blood vessels and stores it as raw data. an MPU would interface with it, processes the raw data, and display it on an LCD, and send it to a Bluetooth module to be displayed on a smartphone.
nRF5x-Biosensing-Boards
Working nRF52/53 microcontroller (ARM + BLE5) prototypes with low-cost sensors
uvm-tutorial-for-candy-lovers
Source code repo for UVM Tutorial for Candy Lovers
AES-Processor
AES crypto engine written in System Verilog and emulated on the Mentor Veloce. First place winner of Mentor Graphics Need For Speed Emulation Competition 2016.
digilent-vivado-scripts
WIP; Set of Python and TCL scripts for working with version controlled Vivado projects
awesome-dv
Awesome ASIC design verification
ECG-Classification
One ECG PVC classification problem
open-watch
An open-source handmade smartwatch. All of the codes, PCBs and schematics are available. ⌚
TIGFET-10nm-SCLIB
An open source standard cell library using TIGFET 10nm devices.
core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
NRF52_Smart_ECG_PPG_example
NRF52 BLE ECG PPG example
mimic_wfdb_tutorials
Tutorials on using the MIMIC Waveform Database
machine-learning-notes
My continuously updated Machine Learning, Probabilistic Models and Deep Learning notes and demos (2000+ slides) 我不间断更新的机器学习，概率模型和深度学习的讲义(2000+页)和视频链接
dive_into_deep_learning
✔️李沐 【动手学深度学习】课程学习笔记：使用pycharm编程，基于pytorch框架实现。
AMBA-APB-I2C-Project
SystemVerilog project where we design a processor and a I2C peripheral to interact with an AMBA APB interface.
UVM-Examples
UVM examples and projects
connectedhomeip
Matter (formerly Project CHIP) creates more connections between more objects, simplifying development for manufacturers and increasing compatibility for consumers, guided by the Connectivity Standards Alliance.
c-code-style
Recommended C code style and coding rules for standard C99 or later
FPGA-USB-Device
An FPGA-based USB full-speed device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB full-speed device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。