Giters

keqiao2017 / AXI_Lite

This is an Ip design for AXI_Lite including master and slave in Vivado 2016.4

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

AXI_Lite

This is an Ip design for AXI_Lite including master and slave in Vivado 2016.4

About

This is an Ip design for AXI_Lite including master and slave in Vivado 2016.4

Languages

Language:Verilog 100.0%