keerthana-menon

rw-python

PDPU

PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications

Posit_Research_Studies

This repository summaries the research studies related to deep learning with posit arithmetic. The studies are sorted by the publication dates either on Conference/Journal or ArXiv and OpenReview. Feel free to reach me (seyed hamed fatemi langroudi) at (email: sf3052@rit.edu) if your publication is missed or the publication date is wrong.

projf-explore

Project F brings FPGAs to life with exciting open-source designs you can build on.

elite_verilog_script

yes

FPU

IEEE 754 floating point unit in Verilog

Posit-HDL-Arithmetic

Universal number Posit HDL Arithmetic Architecture generator

papers-we-love

Papers from the computer science community to read and discuss.

open-fpga-verilog-tutorial

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

Verilog_projects

Some beginner projects using verilog HDL, along with some documentation on basic syntax