kartikeysachdeva / ComputerOrg

Coursework (2nd year) using mainly Verilog/Assembly

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Coursework

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Coursework (2nd year) using mainly Verilog/Assembly


Languages

Language:Verilog 38.3%Language:C 20.4%Language:Assembly 20.0%Language:C++ 11.0%Language:Python 4.7%Language:Stata 2.3%Language:Makefile 1.6%Language:Tcl 0.9%Language:Batchfile 0.6%Language:Mathematica 0.2%