jpsety's repositories
verilog_benchmark_circuits
EPFL and ISCAS85 combinational benchmark circuits in generic gate verilog
verilog2dimacs
Coverts a generic Verilog netlist into the DIMACS format compatible with many SAT solvers
sensitivity_attack
Sensitivity-Based Attack on Strip-Locking Circuits
obfuscation
A set of FIRRTL transforms for obfuscating circuits
systemConfigScript
A script to setup a mac