jianyicheng

Jianyi Cheng's repositories

DSS

DASS HLS Compiler

Language:VHDLBSD-3-Clause26 2 1

iiProver

An LLVM pass to prove that an II works for the given loop for Vitis HLS

Language:C++MIT11 30

HLS-benchmarks

Benchmarks for High-Level Synthesis

Language:C++GPL-3.09 30

svm_hls_on_zynq

Supporting Vector Machine Classsfications Using High-Level Synthesis

Language:C++7 2 1

EASY

Efficient Arbiter SYnthesis (EASY) - a plugin to the LegUp High Level Synthesis tool that simplifies the memory arbitration with the help of formal verifications.

Language:C++2 10

mase-aie-playground

Interface for passing MASE AIE design files to HACC

1 20

circt

Circuit IR Compilers and Tools

Language:C++NOASSERTION000

HLS

Vitis HLS LLVM source code and examples

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kernels

Compute kernels with C description, DFGs, DSP-aware DFGs, FU-aware DFGs and netlist

Language:C000

latte20

Languages, Tools, and Techniques for Accelerator Design

Language:CSS000

Lily58

6×4+4keys column-staggered split keyboard.

Language:CNOASSERTION000

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

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