mat's repositories
ISP-pipeline-hdrplus
Denoise,HDR,Isppipeline,Image-processing(图形处理),camera, Isp ,HDRplus
zynq_cam_isp_demo
基于verilog实现了ISP图像处理IP
HLS-canny-edge-detection
FPGA implementation of Canny edge detection by using Vivado HLS
hls_rawtorgb
An axis rgb to raw converter ip
guided-filter
Fast and complete guided filter implementation for OpenCV
Language:C++MIT000
Language:C++NOASSERTION000
HLS_OpenCV
Some example code and scripts to make OpenCV HW/SW Zynq applications using embedded linux. Developed for the CAS group @ Imperial College London
Language:C000
UnprocessDenoising_PyTorch
Unofficial PyTorch code for the paper - Unprocessing Images for Learned Raw Denoising, CVPR'19
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Language:Python000