jesmith0 / audio_recorder

audio message recorder programmed in VERILOG and designed for the Xilinx Spartan-6 FPGA

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audio message recorder programmed in VERILOG and designed for the Xilinx Spartan-6 FPGA

Language:Verilog 97.2%Language:Tcl 1.2%Language:Shell 1.1%Language:Stata 0.4%