A basic RISC-V core targeting FPGA deployement.
This project uses simpilest RISC-V ISA; RV32I or 32-bit Base Integer ISA. This ISA contains 37 instructions that fit into six categories.
Register Type: Performs integer computation on registers.
Integer Type: Performs integer computation on regs and immediate values (JALR and Load).
Store Type: Performs stores.
Branch Type: Performs branches.
Special Type: Special instructions (LUI, AUIPC).
Jump Type: Performs Jumps (JAL).\