jagjordi / manas

Manus assembler for SiLago

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Manas

A SiLago assembler

Visit SiLago documentation.

Compilation

To compile Manas, you need compilation tool chain: g++, cmake and make.

First, make a directory called "build" under the Manas folder.

mkdir build

Then enter the directory:

cd build

Use cmake to generate makefiles

cmake ..

And finally, compile it

make

Input and Output

The input of Manas is a caseless text file which contains the defination of variables and the list of instructions. The output is a testbench used for simulation under QuestaSim.

Grammar

The input file is a text file. The content is divided into many segments by SEGMENT INSTRUCTIONS. The data segment is used for defining variables while the code segment is used for defining the instruction list.

Segment instructions

.DATA

start a data segment

.CODE

start a code segment

Define a variable

$variable_name distribution_type [<row0, col0>, <row1, col1>, ...] [element0, element1, ...]

or

$variable_name distribution_type [<row0, col0>, <row1, col1>, ...] ZEROS(number_of_element)

or

$variable_name distribution_type [<row0, col0>, <row1, col1>, ...] ONES(number_of_element)

Variable name should always be led by a dollar ($) symbol. The first symbol after dollar ($) should only be underscore ( _ ) or regular latin letter (a-z, A-Z). The following symbol can be underscore ( _ ), regular latin letter (a-z, A-Z) as well as number (0-9).

Distribution type can be either FULL_DISTR or EVEN_DIRSR.

The third argument is a list of DRRA cells.

The last argument is the list of initial value of each element inside the variable.

All variable are considered as a 1-D array in register file.

Define instructions

instruction_name arg0 arg1 ...

or

instruction_name arg0, arg1, ...

or

instruction_name (arg0, arg1, ...)

instruction name can be DPU, REFI1, REFI2, ... For the full list and their detailed argument description, please read the documentation of Vesyla.

Sample code from the test001_01

.DATA
$A EVEN_DISTR [<0,0>] [3,4,5,6,7,8,9,10,11,12]
$B EVEN_DISTR [<0,0>] [5,6,7,8,9,10,11,12,13,14]
$C FULL_DISTR [<0,0>] [0]

.CODE
CELL <0,0>
SWB REFI 0 3 LATA 0 2
SWB REFI 0 2 LATA 0 3
SWB LATA 0 0 REFI 0 1
REFI_1 3 0 0 0 0 0 0 2
REFI_1 2 0 0 10 0 0 0 1
DPU 10 0 3 3 1 0 0 0
REFI_1 1 0 0 20 0 0 0 0

Limitations

  • Doesn't support fixed-point representation, you need to convert fixed-point to integer format manually.
  • Doesn't support DiMarch variable declaration.
  • Doesn't support Input and Output variable type, only Temporary variable type is valid.
  • No static time model analysis. The execution cycle is by default set to 1000.

About

Manus assembler for SiLago

License:Other


Languages

Language:C++ 66.1%Language:RPC 30.1%Language:Yacc 2.7%Language:Lex 0.7%Language:CMake 0.5%