irskid5 / Computer-Processor

Created and simulated a multi-thread, multi-cycle, pipelined processor using Verilog/Assembly, ran on an FPGA chip.

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Created and simulated a multi-thread, multi-cycle, pipelined processor using Verilog/Assembly, ran on an FPGA chip.

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Language:VHDL 79.9%Language:Verilog 12.7%Language:C++ 2.6%Language:HTML 2.3%Language:Assembly 1.8%Language:Stata 0.5%Language:Batchfile 0.1%Language:Mathematica 0.1%Language:Standard ML 0.0%Language:Makefile 0.0%Language:Scheme 0.0%