iceshy's repositories
openfpga
Open FPGA tools
SpinalCrypto
SpinalHDL - Cryptography libraries
sha512
Verilog implementation of the SHA-512 hash function.
aes
Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.
OpenIP
Open source IP collection
Kryon
FPGA,Verilog,Python
swd_programing_sram
Programming internal SRAM over ARM Cortex M3 SWD
pdm_playground
Collection of miscellaneous tools for PDM signals generation, acquisition and decoding
Rattlesnake
PulseRain Rattlesnake - RISCV RV32IMC Soft CPU
raven-picorv32
Silicon-validated SoC implementation of the PicoSoc/PicoRV32
raptor_soc_template
Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.
nlviewer
verilog netlist viewer and analyzer
zc702_dpu140_trd
TRD of DPU v1.4.0 @ Xilinx zc702 board
riscv_soc
Basic RISC-V Test SoC
N3-Minized
N3Z design of Nicola cave radio for the minized
cmsdk_ahb_busmatrix
practice configure AHB-Lite bus protocol
HyperRam
simple hyperram controller
udma_hyperbus
New open source Hyperram IP
cryptech
Collection of CrypTech repos to making cloning easier.
software-based-PUF
The first open source software-based Physically Unclonable Function (PUF) using off-the-shelf SRAM
PulseRain_FP51_MCU
PulseRain FP51 MCU, with peripherals
netlist-graph
Java library for parsing and manipulating graph representations of gate-level Verilog netlists
EDA-Tools
Verilog Gate-Level Studio
QuteRTL
QuteRTL: A RTL Front-End Towards Intelligent Synthesis and Verification
VerilogParser
a simple parser for verilog gate level netlist
netlist-verilog
Netlist and Verilog Haskell Package