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hyperpicc / VerilogCodeECC

Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field

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Contributed to the development of a Verilog module for FPGA-based High-Throughput Generic ECC Implementation in Binary Extension Field.

My contribution includes

• Design and analysis of 128 bit Hybrid Karatsuba Ofman Combinational Multiplier.

• Development of Generic Point Addition, Point Doubling, and Scalar Multiplication Module

• Development of ECDSA host Library

Guides : Abhishek Bajpai, Scientific Officer at BARC

          Saket Saurav, Research Engineer at IIITDM Jabalpur

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Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field

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Language:Jupyter Notebook 83.4%Language:Verilog 14.3%Language:Python 2.0%Language:Coq 0.2%Language:Makefile 0.1%