htminuslab

Hans Tiggeler's repositories

Modelsim-Unicorn

Modelsim QEMU Unicorn integration via the FLI

Language:CGPL-3.013 20

Modelsim-Mersenne-Twister

Adding strong RNG to Modelsim via the FLI

Language:CMIT3 20

Modelsim-Python-Demo2

Demo showing Modelsim calling Python's Numpy and Matplotlib libraries

Language:CMIT3 20

SDRAM-Controller

Micron 128Mb SDRAM controller in VHDL

Language:VHDLMIT300

Flash_Controller

Gowin gw1n-9 Simple Flash Controller in VHDL

Language:VHDLMIT1 20

HTL146818

VHDL Implementation of a 146818 Real Time Clock

Language:VHDLMIT1 10

HTL8237

8237 Direct Memory Controller IP core in VHDL

Language:VHDLMIT1 10

Modelsim-Socket-Fern

Modelsim generating a fern and sending the coordinates via a socket to a display program

Language:VHDLMIT1 10

Modelsim_IPC

Modelsim Inter Process Communication using the FLI

Language:C++MIT1 10

rv32gen

RISC-V 32bits Pseudo Random Instruction Generator

Language:C1 10

HTL80186

80186 Implementation in VHDL

Language:VHDLMIT010

Modelsim-Python-Demo1

Demo showing Modelsim calling Python Contraint Solver

Language:CMIT010

Modelsim_FLI_UART

Modelsim serial port interface via the FLI

Language:VHDLMIT010

HTL8254

82C54 Compatible Programmable Interval Timer IP core

Language:VHDLMIT010

HTL8255

8255 Compatible Programmable Parallel Interface IP core

Language:VHDLMIT010

HTL8259

8259 Compatible Programmable Interrupt Controller IP core

Language:VHDLMIT010