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Teguh Hofstee's repositories

config

Language:Emacs Lisp3 30

digital-design

3 10

shale

Language:Python2 5 4

latte

Language:C++1 20

argparse-subcommand-template

Language:Python020

betelgeuse

Language:Lua070

atrbvh

Implementation for "Bounding Volume Hierarchy Optimization through Agglomerative Treelet Restructuring"

Language:C++NOASSERTION000

cocotb

Coroutine Co-simulation Test Bench

Language:PythonNOASSERTION010

coreir

Language:C++020

cs448m.github.io

course website for cs448m

Language:CSSMIT000

emb

Language:Python020

hdl-zoo

020

hdlConvertor

Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTL4

Language:C++MIT010

hello-emscripten

Language:HTML000

hello-grpc

Language:Python010

hippie

BSD-3-Clause000

hofstee.github.io

Language:HTML020

imgui

Dear ImGui: Bloat-free Immediate Mode Graphical User interface for C++ with minimal dependencies

Language:C++MIT010

lua-verilog

Lua scripts related to Verilog.

Language:Lua020

mflowgen

mflowgen -- A Modular ASIC/FPGA Flow Generator

Language:VerilogBSD-3-Clause010

motion-canvas

Visualize Complex Ideas Programmatically

Language:TypeScriptMIT000

NTrace

GPU ray tracing framework.

Language:C++BSD-3-Clause000

optical-flow

Language:C020

playnote-studio

An unofficial Flipnote Studio animation player for the Playdate console!

Language:Lua000

ploc

Parallel Locally-Ordered Clustering for Bounding Volume Hierarchy Construction

Language:CudaNOASSERTION000

Prusa-Firmware

Firmware for Original Prusa i3 3D printer by PrusaResearch

Language:C++GPL-3.0010

SpireMiniEngine

Language:C++MIT020

tmk_keyboard

Keyboard firmwares for Atmel AVR and Cortex-M

Language:C020

verilog-vcd-parser

A parser for Value Change Dump (VCD) files as specified in the IEEE System Verilog 1800-2012 standard.

Language:C++MIT010

yosys

Yosys Open SYnthesis Suite

Language:C++ISC000