A scalar network analyzer (SNA) measures the amplitude of an output signal of a circuit as a function of the input frequency.
This project provides the circuit, firmware and software to implement a very simple and cheap SNA. It uses a AD9850 DDS module as the programmable signal generator and a AD8307 logarithmic amplifier in conjecture with the ADC of an ATMEGA 168 (or the pin compatible ATMEGA 8/48/88/328) to record the input amplitude. The SNA hardware is interfaced via the common RS-232 using a MAX232 level converter. The firmware for the ATMEGA 168 can be found in the firmware directory.
The client software then provides a simple means of performing the measurements and displays the results. It provides two operating modes. The poll mode outputs a fixed frequency and measures the input amplitude while the scan mode records the input amplitude as a function of the output frequency. The result is then plotted (see above).
As mentioned above, the circuit consists of an AD9850 DDS module (visible below) an ATMEGA 168 (partially covered in the picture) to program the DDS and to measure the output voltage of the logarithmic amplifier (AD8307, visible in the top-left corner). The logarithmic amplifier converts the input power over a 51 Ohms resistor into a voltage (0-2.5V) which is a linear function of the input power in dBm.
The AD8307 can handle up to 17dBm (50mW). The output power of the DDS, however, is only about 0.1mW (-10dBm). To enhence the dynamic range of the SNA, a buffer amplifier (two 2N3904, circuit stolen from here, visible at the bottom-right corner) is used to increase the output to about 1-3mW (0-5dBm).
The SNA is interfaced through the UART (RS-232) of the ATMEGA using a MAX232 level converter (visible in the bottom-left corner). In fact, the hardware is ARDUINO UNO compatible. By flashing the ARDUINO bootloader onto the ATMEGA, the SNA can be programmed easily via the RS-232 interface.
The board is routed such that it is possible to assemble the circuit on a perfboard without bridges. The board dimensions are kept small. The complete circuit fits into a relatively small TEKO 2/A chassis (57 x 72 x 28 mm). For a better performance, the distance between the AD8307 logarithmic amplifier and the rest of the circuit should be increased and the AD8307 should also be shielded. Due to the lack of shielding, my prototype has a relatively large noise level of about -40dBm.
The firmware for the ATMEGA 168 is extremely simply. It just waits for commands received via the serial interface and either sets the frequency of the DDS module, measures the input amplitude or shuts the DDS chip down.
The communication protocol is a simple binary protocol. The host (computer) sends a command to the device (SNA) and receives a response. The device never sends data without a request.
This command will tell the SNA to read the current amplitude.
+------+
| 0x01 |
+------+
On success
+------+------+------+
| 0x00 | 16b value |
+------+------+------+
The 16bit value (big endian) represents the 16bit fraction of the output voltage of the AD8307. This value maps linear to the dBm value where 0 represents -84dBm and 65535 17dBm.
On error
+------+
| 0x01 |
+------+
Sets the frequency of the DDS chip.
+------+------+------+------+------+
| 0x02 | 32b frequency word |
+------+------+------+------+------+
The 32 bit frequency word (big endian) represents the fraction of the output frequency relative to the oscillator frequency (125MHz). I.e. F_out = 125MHz * FW/2^32
On success
+------+
| 0x00 |
+------+
On error
+------+
| 0x01 |
+------+
Sets the frequency of the DDS chip and reads the current amplitude value.
(see set frequency command above)
+------+------+------+------+------+
| 0x03 | 32b frequency word |
+------+------+------+------+------+
On success
+------+------+------+
| 0x00 | 16b value |
+------+------+------+
(see read amplitude command above)
On error
+------+
| 0x01 |
+------+
This command will disable the DDS output.
+------+
| 0x04 |
+------+
On success
+------+
| 0x00 |
+------+
On error
+------+
| 0x01 |
+------+
SNA - A simple scalar network analyzer. (c) 2015 Hannes Matuschek
The hardware is licensed under Createtive Commons BY-SA 4.0 and the software under GPL 2.0+ (see below).
This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.