Snape's repositories
BCOpenMIPS
跟着《自己动手写 CPU》书上写的 OpenMIPS CPU。
Booth_Multipliers
Parameterized Booth Multiplier in Verilog 2001
Language:Verilog000
div
8/4 bit divider
Language:Verilog000
ebit_z7010
The base reference design for EBIT EBAZ4205 Zynq7010 board.
Language:CNOASSERTION000
fpga_nes
FPGA-based Nintendo Entertainment System Emulator
Language:VerilogBSD-2-Clause000
G729_CODE
G.729 Encoder
Language:Verilog000
hdl
HDL libraries and projects
Language:VerilogNOASSERTION000
jtag_vpi
TCP/IP controlled VPI JTAG Interface.
Language:Verilog000
Multiplier16X16
Classic Booth Code, Wallace Tree, and SquareRoot Carry Select Adder
Language:Verilog000
DailySync
Migrate, gather, synchronize your Garmin fitness data.
000
verilog-divider
a super-simple pipelined verilog divider. flexible to define stages
000
wr-switch-hdl
White Rabbit HSR gateware development. Forked from OHWR
000