hiteshb68's starred repositories
verilog-ethernet
Verilog Ethernet components for FPGA implementation
AMBA-3-AHB--LITE-Protocol-Design-and-Verification
-Designed and Verified a Bus Functional Model of AHB-LITE Protocol from scratch. -Developed Assertion based verification IP to verify the bus and check for protocol violations. -Implemented constraint randomization and OOPs verification techniques.
ml-ahb-gen
A Verilog AMBA AHB Multilayer interconnect generator