Hilbert Chen's repositories
Auto-GPT
An experimental open-source attempt to make GPT-4 fully autonomous.
blog_os
Writing an OS in Rust
brainflow
BrainFlow is a library intended to obtain, parse and analyze EEG, EMG, ECG and other kinds of data from biosensors
CH32V203-project-template
Project template for RISCV CH32V203 developement.
common_cells
Common SystemVerilog components
comprehensive-rust
This is the Rust course used by the Android team at Google. It provides you the material to quickly teach Rust to everyone.
dockerlabs
Docker - Beginners | Intermediate | Advanced
dynamorio
Dynamic Instrumentation Tool Platform
etcd
Distributed reliable key-value store for the most critical data of a distributed system
firesim
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
gem5
This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.
hipSYCL
Multi-backend implementation of SYCL for CPUs and GPUs
kibi
A text editor in ≤1024 lines of code, written in Rust
mempool
A 256-RISC-V-core system with low-latency access into shared L1 memory.
meta-qt5
QT5 layer for openembedded
meta-riscv
OpenEmbedded/Yocto layer for RISC-V Architecture
qemu
Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs from the QEMU website.
rbpf
Rust virtual machine and JIT compiler for eBPF programs
riscv-boom
SonicBOOM: The Berkeley Out-of-Order Machine
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
rocket-chip
Rocket Chip Generator
tldr
📚 Collaborative cheatsheets for console commands
veridian
A SystemVerilog Language Server
vscode-bitbake
Bitbake language support for Visual Studio Code
xv6-riscv
Xv6 for RISC-V
yuzu
Nintendo Switch Emulator