haocat's repositories
Learing-for-Advanced-Expriment-Course-in-NJU-2019-Fall-
repository for Advanced Expriment Course Ⅱ in NJU
aes
Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) as specified in NIST FIPS 197. This implementation supports 128 and 256 bit keys.
AES_SBox_GF-2-4-2_composite_field
This is an AES S-Box implementation in verilog , the inverse has been calculated in GF(2^4) field. The irreducible polynomial used is x^4+x+1 , and tau =1 and mu=9
ATV-Bilibili-demo
BiliBili Client Demo for Apple TV (tvOS)
e200_opensource
The Ultra-Low Power RISC Core
FPGA_SM4
FPGA implementation of Chinese SM4 encryption algorithm.
GM-Standards
中华人民共和国密码行业标准(GM/T)文本
img_bed
img bed
LDPC
Exact BP decoder. EG, PG, PEG-ACE, 80211n, 80216e LDPC codes. Many modulation schemes.
LDPC-1
Simulation for a given LDPC matrix.
LDPC_en-decoder
LDPC编码解码matlab代码和Verilog代码及资料
lede
Lean's OpenWrt source
LEGv8
A simple implementation about LEGv8 instruction set using Verilog HDL.
lk2nd
Custom bootloader for Qualcomm MSM8916/MSM8226/MSM8974/... devices
Modexpowering3
a 2048 bit RSA verilog project basing on Montgomery , Karatsuba multiplier
NumericalMethod-Course-in-NJU-2020-SPRING-
This is a git for NumericalMethod-Course
OpenWrt-CI
OpenWrt CI 在线集成自动编译环境
openwrt-modify
简单的脚本用于修改openwrt镜像
preserve-cd
Game Preservation Project
RSA4096
4096bit RSA project, with verilog code, python test code, etc
sm3_highP
A implement of Chinese SHA(SM3) on FPGA from SHU ACTION team
trapping-sets-enumeration
Enumerating of Trapping sets in QC-LDPC codes