HanderRi's starred repositories
Swin-Transformer
This is an official implementation for "Swin Transformer: Hierarchical Vision Transformer using Shifted Windows".
ViT-FPGA-TPU
FPGA based Vision Transformer accelerator (Harvard CS205)
Xilinx-FPGA-HLS-PYNQ-ALVEO-Flow
Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.
sift_pyocl
An implementation of SIFT on GPU with OpenCL
FPGA_SIFT_Algorithm
Implementation of SIFT Algorithm on FPGA
HLS_SIFT_subkernel
Sub part of the SIFT algorithm as a Vitis HLS accelerated kernel
SIFT-implementation-in-Verilog
Using Verilog to implement the SIFT algorithm into an FPGA for small robotic situations
Transformer-Accelerator-Based-on-FPGA
You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size of the systolic array can be changed, now it is 16X16.
segment-anything-with-clip
Segment Anything combined with CLIP
segment-anything
The repository provides code for running inference with the SegmentAnything Model (SAM), links for downloading the trained model checkpoints, and example notebooks that show how to use the model.
paper-reading
深度学习经典、新论文逐段精读
kria-vitis-platforms
Kria Vitis platforms and overlays