wesleyguo's repositories
usb4java
USB library for Java based on libusb
che
Eclipse Che: Next-generation Eclipse IDE. Open source workspace server and cloud IDE.
usb4java-javax-examples
Example programs demonstrating how to use the javax-usb API of usb4java.
libusb4java
The native JNI library used by usb4java
gitlabhq
GitLab CE Mirror | Please open new issues in our issue tracker on GitLab.com
yosys-web
Yosys Web Page
FfDL
Fabric for Deep Learning (FfDL, pronounced fiddle) is a Deep Learning Platform offering TensorFlow, Caffe, PyTorch etc. as a Service on Kubernetes
MIPS-Verilog
MIPS R3000 processor verilog code to be synthesized on Spartan 3E FPGA board.
firesim
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation of RISC-V Systems (Rocket Chip, BOOM) in the Cloud
hbird-e-sdk
The software development kit for Hummingbird E200 Series RISC-V Core and SoC platform
MOTHBALLED-graphviz
Moved to https://gitlab.com/graphviz/graphviz
firesim-software
Automatically Builds a Linux Distribution for FireSim/FireChip Nodes, works with FireSim's automatic workload generation.
collection-default
:snowflake: Icestudio Default Collection
klfm18
KLFM implementation using C++17
e200_opensource
The Ultra-Low Power RISC Core
linux-digilent
Linux Repository for digilent boards
docker_open-src-cvc
Dockerfile for OSS CVC verilog simulator
NeoGeoFPGA-sim
Simulation only cartridge NeoGeo hardware definition
mips-cpu
MIPS CPU implemented in Verilog
hw
RTL, Cmodel, and testbench for NVDLA
doc
Documentation for NVDLA.
tensorflow
Computation using data flow graphs for scalable machine learning
tkgate
A graphical editor and event-driven simulator for digital circuits
rtl8188eu
Repository for stand-alone RTL8188EU driver.
scr1
SCR1 is an open-source RISC-V compatible MCU core
vivado
company-vivado
vim
vim配置文件和插件
RV12
RISC-V CPU Core