gaogaogao0

OWM-tf2

subservient

Small SERV-based SoC primarily for OpenMPW tapeout

zephyr

Primary GIT Repository for the Zephyr Project

corescore

CoreScore

fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

serv

SERV - The SErial RISC-V CPU

awesome-complexity

An awesome list of complex systems science resources

Tiniux-v3.0.0-comments

该仓库是 Tiniux OS v3.0.0 的注释版，供学习交流使用，本人会不断地维护注释质量。

atomthreads

Lightweight, Portable RTOS Scheduler

aidc

Program to optimize the design of DC-DC converter controllers

GAN_Synchronous_Buck

Synchronous DC/DC Buck Converter using GaN FETs

model-based-design-dc-dc-converter

Model-Based Design of a DCDC Converter using Simulink, Simscape and Stateflow

EE464-TermProject

This repository includes the works about design of DC/DC converter with suppy of 100W.

dc_dc_simulator

Simulator for DC-DC power converters

Power-Boards

Collection of DC/DC Converters, Battery Chargers, and Power Supplies

gmIdNeoKit

Gm Id Kit with GUI to Work with Matlab Data file similar to Prof. Boris Murmann's gm/ID Starter Kit

pyMOSChar

Python port of Prof. Boris Murmann's gm/ID Starter Kit

HR_Comparison_using_ECG_PCG_BCG

In this project I examined three different methods to monitor the heart activity. The "gold standard" is considered to be ECG, therefore the other 2 methods which are PCG and BCG are compared to the ECG signal. ECG records the heart electrical activity, PCG records the heart sound and BCG records the ballistic forces generated by the heart. All three methods allow to compute the Heart Rate signal of the heart by detecting the periodicity in each of the signals

DeepLearning-500-questions

深度学习500问，以问答形式对常用的概率知识、线性代数、机器学习、深度学习、计算机视觉等热点问题进行阐述，以帮助自己及有需要的读者。 全书分为18个章节，50余万字。由于水平有限，书中不妥之处恳请广大读者批评指正。 未完待续............ 如有意合作，联系scutjy2015@163.com 版权所有，违权必究 Tan 2018.06

pytorch-lif-autograd

Image-Classification-using-CNN-on-FPGA

Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.

cnn_hardware_acclerator_for_fpga

This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs

CNN-FPGA

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

convolution_network_on_FPGA

CNN acceleration on virtex-7 FPGA with verilog HDL

oh

Verilog library for ASIC and FPGA designers

darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

open-fpga-verilog-tutorial

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

STM32F4_Image_Processing

使用stm32F407芯片和ov7725摄像头对视频流进行图像处理，包括图像二值化，颜色识别等

CIFAR10_STM32_Image_Classificatio

Image Classification with STM32 using CIFAR-10 Dataset

cifar10_image_classifier_on_stm32

image classifier on stm32