Article Title: IMA-BLC: Iterative Median-Averaged Adaptive Black-Level Correction Method
We used Xilinx Vivado 2018.3 as the design platform and Verilog HDL as the development language. We used the Xilinx Virtual-7 FPGA VCU118 board, which has 1,182,240 LUTs and 2,364,480 FFs.