fennecJ / vlsi_design_practice

A set of verilog practice codes

Course name "Introduction to vlsi design" from NCKU

Gate level

Lab1

• Some simple verilog practice

Lab2

ProbA

• Implement a 4x2 priority encoder

ProbB

• Implement a Full Adder

ProbC

• Implement a 5 bits ripple adder with hierarchy skills

RTL level

Lab3

ProbA

• Implement a 8 to 1 mux

ProbB

• A simple ALU instruction set

ProbC

• A simple grayscale module using shift to map 24 bits r,g,b color into 8 bits The result is approximation due to loss of shift operation

Lab4

ProbA

• A simple model for a 64*32 register file

ProbB

• A simple model for a vending machine which can do:
  Get input money
  Get price of selected beverage
  Output the change = money - price
  

ProbC

• A simple 3*3 convolution model with shift reg

Lab5

ProbA

• A simple moore FSM

ProbB

• A simple mealy FSM

ProbC

• A simple 65536*24bits RAM module
• A simple 16384*24bits ROM module

ProbD

• A simple shift convolution module

ProbE

• A simple grayscale converter which convert 800*600 bmp rgb pics into gray scale pic