P.A.I.M.O.N's starred repositories
core-v-cores
CORE-V Family of RISC-V Cores
riscv-isa-sim
Spike, a RISC-V ISA Simulator
core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
chinese-poetry
The most comprehensive database of Chinese poetry 🧶最全中华古诗词数据库, 唐宋两朝近一万四千古诗人, 接近5.5万首唐诗加26万宋诗. 两宋时期1564位词人,21050首词。
verilog-axi
Verilog AXI components for FPGA implementation
basic_verilog
Must-have verilog systemverilog modules
rocket-chip
Rocket Chip Generator
risc-v-core
This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve Hoover