eugene-n / mesm6

Implementation of BESM-6 clone in Verilog

MESM-6

Implementation of BESM-6 compatible processor in Verilog.

Implementation of BESM-6 clone in Verilog

MIT License

Language:C 51.0%Language:SystemVerilog 32.0%Language:Python 10.1%Language:Makefile 6.3%Language:Shell 0.5%Language:Pascal 0.1%