Lee Moore's repositories
riscv-bitmanip
Working draft of the proposed RISC-V Bitmanipulation extension
core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
cvw
Configurable RISC-V Processor
dump1090
Dump1090 is a simple Mode S decoder for RTLSDR devices
esp32-i2c-master
this example file implements a esp32 as master that can communicate with another esp32 (as slave)
esp32-i2c-slave
this example file implements a esp32 as slave that can communicate with another esp32 (as master)
esp32-softap-ota
Minimal esp-idf example of HTTP portal to perform OTA updates of ESP32 in SoftAP mode
frogfs
Fast Read-Only General-purpose File System (ESP32/ESP8266 compatible)
ogn-rf
This software listens to OGN radio messages and sends it to Open Glider Network.
riscv-dv
SV/UVM based instruction generator for RISC-V processor verification
riscv-ovpsim
OVP Simulator for RISC-V
riscv-toolchains
gnu toolchains including vector assembler
riscv-v-spec
Working draft of the proposed RISC-V V vector extension
RVVI
RISC-V Verification Interface