erihsu

Sym-CTS

symmetric clock tree synthesis for NTV IC design

mincost

A collection of modern heuristic optimization framework written in Rust

gds2-io

GDSII format IO utils

liberty2json

Convert Liberty(.lib) file into json, inspired by skywater-pdk

vgg16_quantization

The tensorflow vgg16 quantization implementation

svfmt

systemverilog format

instlist

tree-sitter-riscvasm

tree sitter for riscv assembly

vcd-io

VCD spec IO

awesome-yew

😎 A curated list of awesome things related to Yew / WebAssembly.

circt

Circuit IR Compilers and Tools

dotfiles

Eric's personal dot file configuration

erihsu

erihsu.github.io

My personal website

iced

A cross-platform GUI library for Rust, inspired by Elm

iron-kaleidoscope

LLVM tutorial in Rust language

lapce

Lightning-fast and Powerful Code Editor written in Rust

learn-wgpu-yew

A learn-wgpu in yew.

leptos

Build fast web applications with Rust.

nom

Rust parser combinator framework

package_control_channel

Default channel file for Package Control. Follow the directions at:

poem

A full-featured and easy-to-use web framework with the Rust programming language.

riscv-bitmanip

Working draft of the proposed RISC-V Bitmanipulation extension

sv-parser

SystemVerilog parser library fully complient with IEEE 1800-2017

UVMLog

UVM log file highlighting plugin for Sublime Text

verible

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

verilog-filelist-parser

A Verilog Filelist parser in Rust

wasm-bindgen

Facilitating high-level interactions between Wasm modules and JavaScript

webapp_demo

my first webapp demo

wgpu

Safe and portable GPU abstraction in Rust, implementing WebGPU API.