Enclustra GmbH

en_cl_fix

Fixed-point math library with VHDL, Python and MATLAB support

PetalinuxDocumentation

IseScripting

Python Utilities to use Xilinx ISE Tools from Python Scripts

psi_common

Common elements for FPGA Design (FIFOs, RAMs, etc.)

psi_fix

Fixed-point library with bittrue implementations in VHDL (for FPGA) and python (for simulation)

psi_multi_stream_daq

Data acquisition of multiple AXI-S streams to a memory connected via AXI-MM (e.g. DDR memory) written in VHDL

psi_tb

Utilities to simplify writing VHDL testbenches for FPGA Designs

PsiFpgaLibDependencies

Dependency resolution scripts for PSI FPGA Libraries

PsiIpPackage

TCL framework to package Vivado IP-Cores

PsiPyUtils

Python utility functions used in several FPGA related python libraries of PSI

PsiSim

TCL Framework for creating FPGA design regression tests using Modelsim or GHDL

SignalProcessing

Signal processing tools that are not present in scipy but often used

TbGenerator

Program that generates VHDL testbench skeletons from a parsed VHDL entity automatically.

vivadoIP_clock_measure

Measure frequency of several clocks and make it available via AXI-MM

VivadoScripting

Python Utilities to use Xilinx Vivado Tools from Python Scripts

ebe-docs

Github pages with the EBE documentation

Mercury_AA1_PE1_Reference_Design

Mercury_AA1_PE3_Reference_Design

Mercury_AA1_ST1_Reference_Design

Mercury_SA1_PE1_Reference_Design

Mercury_SA1_PE3_Reference_Design

Mercury_SA1_ST1_Reference_Design

Mercury_SA2_PE1_Reference_Design

Mercury_SA2_PE3_Reference_Design

Mercury_SA2_ST1_Reference_Design

Mercury_XU61_PE3_Reference_Design

Mercury_XU61_ST1_Reference_Design

meta-enclustra-socfpga

Yocto BSP layer for Intel SoC modules

psi_fpga_all

Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.

xtools

Collection of useful AMD/Xilinx TCL packages to automate design flows (e.g. IP-Packaging).