ekadatskii's repositories

interconnection_lvds

Interconnection between parallella and pars board with lvds

Language:VerilogStargazers:3Issues:0Issues:0

ethernet1g

Ethernet 1G with opencores mac and lantiq phy on cyclone 10lp

Language:VerilogStargazers:2Issues:0Issues:0
Stargazers:0Issues:0Issues:0
Language:PythonStargazers:0Issues:0Issues:0
Stargazers:0Issues:0Issues:0

hw_python_oop

Sprint 2. Итоговый проект.

Language:PythonStargazers:0Issues:0Issues:0
Language:ShaderLabStargazers:0Issues:0Issues:0
Language:VerilogStargazers:0Issues:0Issues:0