Eric J. Chet's repositories
5Vpld
A collection of scripts and tools for Atmel ATF150x and GAL Programmable logic devices, some of the only standing active 5V programmable logic parts still available.
authelia
The Single Sign-On Multi-Factor portal for web apps
byte-buddy
Runtime code generation for the Java virtual machine.
cloudnative-pg
CloudNativePG is a Kubernetes operator that covers the full lifecycle of a PostgreSQL database cluster with a primary/standby architecture, using native streaming replication
core-js
Standard Library
Digital
A digital logic designer and circuit simulator.
fdb-kubernetes-operator
A kubernetes operator for FoundationDB
freerouting
Advanced PCB auto-router
GALasm
Very slightly modified version of Alessandro Zummo's GALasm 2.1, for programming GAL devices
Gooey
Turn (almost) any Python command line program into a full GUI application with one line
Hazard3
3-stage RV32IMACZb* processor with debug
langchain
⚡ Building applications with LLMs through composability ⚡
nanoGPT
The simplest, fastest repository for training/finetuning medium-sized GPTs.
nginx
An official read-only mirror of http://hg.nginx.org/nginx/ which is updated hourly. Pull requests on GitHub cannot be accepted and will be automatically closed. The proper way to submit changes to nginx is via the nginx development mailing list, see http://nginx.org/en/docs/contributing_changes.html
pg_auto_failover
Postgres extension and service for automated failover and high-availability
picoterm
Pi Pico VGA Terminal Emulator For RC2014
redis
Redis is an in-memory database that persists on disk. The data model is key-value, but many different kind of values are supported: Strings, Lists, Sets, Sorted Sets, Hashes, Streams, HyperLogLogs, Bitmaps.
revng
revng: the core repository of the rev.ng project
rocket-chip
Rocket Chip Generator
RomWBW
System Software for Z80/Z180/Z280 Computers
rv32emu
Compact and Efficient RISC-V RV32I[MAFC] emulator
terraform
Terraform enables you to safely and predictably create, change, and improve infrastructure. It is a source-available tool that codifies APIs into declarative configuration files that can be shared amongst team members, treated as code, edited, reviewed, and versioned.
VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation