eine

tip

GitHub Action to keep a 'tip' pre-release always up-to-date

hwd-ide

vhdl-cfg

Playground to explore and compare how configuration is handled by different tools for development of VHDL projects

icemulti

Dynamic reconfiguration in iCE40 FPGAs

elide

Embedded Logic Integrated Design Environment

actions

dtd

ghdl-packaging

Sources for package management systems to build GHDL

login-action

:octocat: GitHub Action to login against a Docker registry

VexRiscvSocSoftware

weView

A cross platform waveform viewer, based on Javascript and its technology, capable to display (e)VCD, WLF and LXT(2) waveform formats

bare-hugo-theme

A Hugo theme based on Bulma.io

ghdl

VHDL 87/93/2002/2008 simulator

ghdl-rpm

ghdl-yosys-plugin

VHDL synthesis (based on ghdl)

JSON-for-VHDL

A JSON library implemented in VHDL.

pactoys

A set of pacman packaging utilities.

psl_with_ghdl

Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)

SpinalHDL

SpinalHDL core

tox

Command line driven CI frontend and development task automation tool

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

vunit

VUnit is a unit testing framework for VHDL/SystemVerilog