Single level Fully Associative Cache, Direct Mapped Cache, N-way Set Cache are implemented in a highly user-interactive terminal interface. The programming language of the aforementioned implementation is Java (based on OOPS).
The implemented caches simulate to a very high extent the functionality with extensive showcase of oops modularity to model a real-world computer’s inbuilt cache. The programming done is very user-friendly, error-free and the application is very convenient to use and easy to get familiar with the inbuilt functionalities.
Dependencies
Java (TM) SE Runtime Environment (build 13.0.1+9)
Usage/ Code Functionality
Direct the program “Main.java” into a suitable directory, and load your command prompt into the same directory and execute the program.
java Main.java
- help
- - Get an overview of the functionality of the caches and various commands.
- exit
- - Exit the cache terminal.
- init
- - Initialize a cache, when a cache is initialized, the program simulates a directory behaviour.
- info
- - Show initialized cache parameters, the bits required for each parameter and the address format breakdown a cache simulates for accessing a data value.
- type
- - Show initialized cache type.
- write
- - Write a data value at a specific address.
- - Input data must be an integer value. [1 Byte]
- - The input address is binary and shall not be inputted compulsorily as a 32bit address, as the program auto completes the address.
- - The program outputs a write hit or a write miss.
- - For FA cache and NW cache, LRU schemes are followed (when caches are full) in which the data block with the oldest timer count is evicted. As the caches are single level, evicted data block is reinitialized to 0.
- - For DM cache, in case of hit, the data is overwritten at the input address but in case of a miss, the block at the index calculated from the address is evicted and reinitialized to 0.
- - The written block gets allotted the program’s timer count.
- read
- - Read the value at a specific address.
- - The input address is binary and shall not be inputted compulsorily as a 32bit address, as the program auto completes the address.
- - The program outputs a read hit or read miss.
- - In case of a read hit, the program outputs the respective cache’s formatted address with the data value and updates the timer count of the read block with the program’s timer count.
- - In case of read miss, the block is loaded(written) into the cache initialized with default value i.e. 0. The loaded block’s timer count is updated with the program’s timer count.
- clear
- - Refresh your caches, reinitialize them by setting respective parameters to default.
- - Return to the root directory.
- time
- - Know the value of cache timer which is used to time the block.
- - The cache timer is incremental and resets to 0 when cleared.
- - Forms the basis of our LRU policy.
- - Print the initialized cache.
- - Printing is done according to address formatting to aid to user convenience.
- - DM cache is initialized by default value and address while FA and NW are set to empty.
For Information on overview of Cache functionalities and Error Handling in the project, Please refer the docs (pdf)! 📚