duck2 / symbiflow-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

SymbiFlow Architecture Definitions

This repo contains documentation of various FPGA architectures, it is currently concentrating on;

• Lattice iCE40
• Xilinx Series 7 (Artix 7 and Zynq 7)

The aim is to include useful documentation (both human and machine readable) on the primitives and routing infrastructure for these architectures. We hope this enables growth in the open source FPGA tools space.

The repo includes;

• Black box part definitions
• Verilog simulations
• Verilog To Routing architecture definitions
• Documentation for humans

The documentation can be generated using Sphinx.

Getting Started

Make sure git submodules are cloned:

git submodule init
git submodule update

Install Python libraries:

# Make sure additional libraries are installed
sudo apt-get install libxml2-dev libxslt1-dev lib32z1-dev
pip install -r requirements.txt

Run the full suite:

make

Tools installed via submodules

• third_party/netlistsvg Tool for generating nice logic diagrams from Verilog code.

• third_party/icestorm Bitstream and timing database + tools for the Lattice iCE40.

• third_party/prjxray Tools for the Xilinx Series 7 parts.

• third_party/prjxray-db Bitstream and timing database for the Xilinx Series 7 parts.

Tools installed via conda

• yosys Verilog parsing and synthesis.

• vtr Place and route tool.

• iverilog Very correct FOSS Verilog Simulator

Tools potentially used in the future

• verilator Fast FOSS Verilog Simulator

• sphinx Tool for generating nice looking documentation.

• breathe Tool for allowing Doxygen and Sphinx integration.

• doxygen-verilog Allows using Doxygen style comments inside Verilog files.

• symbolator Tool for generating symbol diagrams from Verilog (and VHDL) code.

• wavedrom Tool for generating waveform / timing diagrams.

Resource Requirements

To run examples provided, please make sure these resources are available:

• Memory: 5.5G
• Disk space: 20G