RegisterFileVHDL
Circuit design of a 16bit datapath system containing a register file with 8 registers and also a functional unit. Operations available include data transfers, logic operations, arithmetic operations and shifter operations.
Also contains testbenches for each respective component.
Components
- Datapath
- Register File
- Function Unit
- Arithmetic Unit
- Logic Unit
- ALU (16 bit)
- ALU (1 bit)
- Full Adder
- Shifter (16 bit)
- Shifter (1 bit)
- Zero Detect
- Multiplexer(2to1 - 16bit)
- Multiplexer(2to1 - 1bit)
- Multiplexer(8to1 - 16 bit)
- Register(16 bit)
- Decoder (3to8)
System Overview:
Circuit Schematic (Adjusted to 8 Registers):
