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Language:Verilog 42.1%Language:VHDL 28.1%Language:C 6.0%Language:C++ 5.9%Language:Eagle 5.3%Language:HTML 3.7%Language:Assembly 3.6%Language:Tcl 1.3%Language:Makefile 1.2%Language:Shell 0.8%Language:Perl 0.8%Language:Stata 0.5%Language:Batchfile 0.3%Language:SystemVerilog 0.2%Language:KiCad Layout 0.2%Language:Objective-C 0.0%Language:Standard ML 0.0%