Devang Khamar's repositories
CORDIC-core
CORDIC IP and verification modules.
RapidWright
Build Customized FPGA Implementations for Vivado
Language:JavaNOASSERTION000
Algorithms
A Random collection of algorithms
Language:C++000
SytemVerilog_Examples
The Best way to learn is to implement. Hence, this repo will feature SystemVerilog designs and test benches aimed at excercising different features of SystemVerilog
Language:SystemVerilog000
ECE4530
Codes related to Hardware Software Codesign
000