davidwlewis / Oz

Hardware Description Language embedded in Idris

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Oz

This project is an attempt to implement a Hardware Description Language in Idris.

At the moment it simply does representation and simulation, but the intent is that the Circuit structures defined in Signal.idr be fairly directly mapped to VHDL as output.

Basics.idr contains a few ways to express circuit primitives.

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Hardware Description Language embedded in Idris


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