Dave's repositories
sigma_delta_converters
Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components
96band_msa
Music spectrum analyzer implemented on a 7-series FPGA with novel DSP algorithms written in VHDL to accurately bin piano keys to frequency ranges and display in real-time
10band_nixie
Analog spectrum analyzer using old-world IN-9 neon gas Nixie Tubes on a through-hole PCB
BrianHG-DDR3-Controller
Personal fork of open-source DDR3 PHY and controller
camera_journey
Various lessons learned while designing an OV5640 camera display in VHDL/Embedded Linux on a Cyclone V SOC board
fpga_mandlebrot_fractal
Mandlebrot fractal engine and native HDMI video pipeline designed in VHDL with a focus on timing analysis and resource utilization
esp32_led_matrix_server
LED Matrix Display via ESP32/Wifi microSD
cvw
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
fork-gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
gravity-sim
Basic script for simulating Newtonian-celestial bodies using Pygame
ibex
Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
youtube-rip
Python script for ripping albums from Youtube utilizing yt-dlp and ffmpeg