danodus / polyphony

3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.

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Polyphony: 3D Graphics Rendering System

Overview

Polyphony is a 3D graphics rendering system. Rasterizer is written in Verilog, and Geometry Engine is written in C.

Polyphony rasterizer internal block

  • Vendor-independent RTL design.
  • Interface: AXI4
  • Tested on FPGA boards.
  • GLES API is partially implemented.
  • Baremetal demo applications.

FPGA Board

Polyphony is implemented and tested on Zedboard.

zedboard block

Verilog RTL Simulation

Tested Environment

OS: CentOS7.8

Verilog Simulator: Icarus Verilog version 11.0

Test Scenarios

simple triangle rendering

cd sim_work
../bin/run_iv.sh ../scenario/3d/simple_triangle.v 

After finishing the simulation, VGA rendering result(result.bmp) will be generated.

simulation result

simple texture-mapped triangle rendering

cd sim_work
../bin/run_iv.sh ../scenario/3d/simple_triangle_tex.v 

After finishing the simulation, VGA rendering result(result.bmp) will be generated.

simulation result

Running the demo on FPGA board

see ZEDBOARD.md

Demo applications

moving lights

moving lights

cook-torrance shading model

cook-torrance

texture mapping

texture

skinning

skinning

anaglyph

skinning

License

This project is licensed under the MIT License - see the LICENSE file for details

3D graphics Library Header Files

This design utilizes GL, GLES, and GLU header files below.

  • GL
    • gl.h
    • glext.h
  • GLES
    • gl.h
    • glext.h
  • GLU
    • glu.h

About

3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.

License:MIT License


Languages

Language:Verilog 72.7%Language:C 21.4%Language:Tcl 3.2%Language:Coq 2.7%