cutelolly / NiteFury

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NiteFury: FPGA-based coprocessor in M.2 format

NiteFury is Xilinx Artix A200 FPGA & DDR3 in a small form factor (M.2 2280 M key).


  • Xilinx A200T FPGA: Just under 1000 GMAC/s
  • 8Gb DDR3 on board. DDR3-800 x16 (1.6GB/s)
  • PCIe x4 gen 2 interface to FGPA (2GB/s)
  • IO: 4x LVDS pairs and 4 general purpose


Feature Specification
FPGA Xilinx Artix XC7A200T-2FBG484E
RAM DDR3, 8Gb (512MBx16)
Form Factor M.2 (NGFF), keyed for M slot
Dimensions 22x80x4.7mm (without heatsink)
Host Interface PCIe x4 gen 2 (20 Gb/s)
Host Tools Vivado
Built-in JTAG No
External I/O
via I/O connector
12 Total, 4 selectable analog or digital
External I/O via PCIe connector 1x 3.3V digital I/O (LED), SMBus
User-controllable LEDs 4

Block Diagram

NiteFury block diagram

DSP Processing metrics (DSP slices)

DSP metrics diagram

NiteFury has 6x the processing power of PicoEVB, and is comparable with midrange Kintex devices


Image of NiteFury top Image of NiteFury bottom

Prototype pics

Image of NiteFury top Image of NiteFury bottom

Verified configurations

  • XC7A200T-2 with 4Gb DDR3-800

How to get one

More information


Public repository for uEVB


Language:C 30.9%Language:SystemVerilog 26.0%Language:Batchfile 24.0%Language:Verilog 10.1%Language:Makefile 3.7%Language:C++ 1.7%Language:Tcl 1.7%Language:Shell 1.3%Language:Stata 0.4%Language:CMake 0.2%Language:Python 0.1%