chipsalliance / f4pga

FOSS Flow For FPGA

Home Page:https://f4pga.org

Geek Repo:Geek Repo

Github PK Tool:Github PK Tool

Compiling examples returns yosys error

amibranch opened this issue · comments

I was trying to use f4pga, but I am having problems to start it with the examples, provided here:
https://github.com/chipsalliance/f4pga-examples/tree/main/xc7/counter_test

Executing f4pga either via the Makefile as described in the README.md of the path above or via the dedicated execution, like
TARGET=arty_35 f4pga -vvvv build --flow ./flow.json
will only lead to the following error:

Executing module `yosys`:
    [1/3] : Synthesizing sources: ['/f4pga-examples/xc7/counter_test/counter.v']...
[ERROR]: yosys non-zero return code.

stderr:
ERROR: TCL interpreter returned an error: Yosys command produced an error

Unfortunately the error-log is not really sufficient to narrow down the problem further. However, using strace I was able to get a little more information. I was able to read the stdout produced by yosys and it contains as last line:
ERROR: Can't load module './xdc': /usr/bin/../share/yosys/plugins/xdc.so: cannot open shared object file: No such file or directory\n

Is the plugin missing in the yosys-package of my distribution or is this an unintended error, caused by a wrong yosys-usage within f4pga?