Why create ioplace first and then create constraints.place for Artix-7
lgl1227 opened this issue · comments
In f4pga-examples : counter_test
run
TARGET="arty_35" make -C counter_test
constraints.place has the same content as ioplace
FOSS Flow For FPGA
lgl1227 opened this issue · comments
In f4pga-examples : counter_test
run
TARGET="arty_35" make -C counter_test
constraints.place has the same content as ioplace