channel align per-channel strobe detection logic is not reset correctly for SYNC_FIFO=0

[nij-intel]

Most of the application we dealt with are using SYNC_FIFO=1 mode for channel alignment.

We came across an application needing to use SYNC_FIFO=0 mode. For this mode strobe detection logic is not reset correctly because it not synchronized with the per-lane clock.

https://github.com/chipsalliance/aib-protocols/blob/main/ca/rtl/ca_rx_align.sv#L286

https://github.com/chipsalliance/aib-protocols/blob/main/ca/rtl/ca_rx_align.sv#L501

[nij-intel]

clock domain synchronization for SYNC_FIFO=0

1. soft_reset_lane from com_clk to lane_clk - re-use already synchronized signal from ca_rx_align_fifo
2. wr_overflow_pulse from lane_clk to com_clk
3. d_stb_det_state from com_clk to lane_clk