chipsalliance / aib-protocols

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Double-flop synchronize data from SPI SCLK domain to AVMM clock

dkehlet opened this issue · comments

Not strictly needed for data integrity however it eases CDC analysis. Show that TRANS_VALID in AVMM domain always occurs after all data is stable in AVMM domain.

Fixed both RTL for SPI slave and master IP core. Modified SDC files.