[0.9.6] CA M2S2_GEN2F2F_18 and M2S2_GEN2_F2F_ALIGN_FLY1_1 test fails
nij-intel opened this issue · comments
UVM_INFO ./eximius/0.9.6/ca/dv/tb/../tests/base_ca_test.sv(260) @ 997500000: uvm_test_top [ck_xfer_cnt] >>> DIE_A tx_din: 460 != DIE_B rx_dout: 0 <<<
UVM_INFO.a/eximius/0.9.6/ca/dv/tb/../tests/base_ca_test.sv(282) @ 997500000: uvm_test_top [ck_xfer_cnt] >>> DIE_B tx_din: 368 != DIE_A rx_dout: 0 <<<
UVM_INFO .a/eximius/0.9.6/ca/dv/tb/../tests/base_ca_test.sv(244) @ 997500000: uvm_test_top [GLOBAL_TIMER] ....sim heartbeat 1995000 cycles....
UVM_INFO ./0.9.6/ca/dv/tb/../tests/base_ca_test.sv(260) @ 1000000000: uvm_test_top [ck_xfer_cnt] >>> DIE_A tx_din: 460 != DIE_B rx_dout: 0 <<<
UVM_INFO ./0.9.6/ca/dv/tb/../tests/base_ca_test.sv(282) @ 1000000000: uvm_test_top [ck_xfer_cnt] >>> DIE_B tx_din: 368 != DIE_A rx_dout: 0 <<<
UVM_FATAL ./0.9.6/ca/dv/tb/../tests/base_ca_test.sv(242) @ 1000000000: uvm_test_top [GLOBAL_TIMER]
> TEST ENDS with GLOBAL TIMEOUT at 1000000000 <
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 2956
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 1
** Report counts by id
[AIB ENV CFG] 1
[CA_CFG] 42
[GLOBAL_TIMER] 401
[MASTER CFG] 8
[RESET DRV] 1
[RNTST] 1
[SLAVE CFG] 8
[UVMTOP] 2
[actual ca_tx_tb_out_cfg] 2
[aib_master_por_driver] 36
[aib_master_prog_default_sequence] 2
[aib_master_prog_driver] 1
[aib_slave_data_monitor] 8
[aib_slave_por_agent] 1
[aib_slave_por_agent build_phase ] 1
[aib_slave_por_driver] 54
[aib_slave_prog_driver] 32
[aib_vip_top] 1
[base_ca_test_c::build_phase] 2
[base_test] 2
[body] 13
[build_phase] 3
[ca_rx_tb_in_agent_c::new] 4
[ca_rx_tb_in_drv_c::new] 4
[ca_rx_tb_in_mon_c::new] 4
[ca_seq_lib_c::body] 1
[ca_top_env_c::build_phase] 2
[ca_top_env_c::connect_phase] 2
[ca_tx_tb_in_agent_c::new] 4
[ca_tx_tb_in_mon_c::new] 4
[ca_tx_tb_out_agent_c::new] 4
[ca_tx_tb_out_drv_c::new] 4
[ca_tx_tb_out_mon_c::new] 4
[ca_wd_bit_sel_ones_cover_test ::run_phase] 22
[ca_wd_bit_sel_ones_cover_test::run_phase] 3
[ca_wd_bit_sel_ones_cover_test_c] 3
[ca_wd_bit_sel_ones_cover_test_c::run_phase] 1
[calc_stb_beat] 442
[chan_delay_agent_c::new] 48
[chan_delay_drv_c::new] 48
[chan_delay_mon_c::new] 48
[ck_xfer_cnt] 802
[drv_reset] 1
[error ca_tx_tb_out_cfg] 2
[gen_stb_beat] 14
[generate_stb_beat] 3
[intel_aib_base_test] 2
[intel_aib_init_base_test] 24
[mon_reset] 1
[mon_tx] 6
[verify_rx_dout] 828
$finish called from file "/p/psg/eda/synopsys/vcsmx/R-2020.12-SP2/linux64/suse/etc/uvm/base/uvm_report_object.svh", line 292.
$finish at simulation time 1000000000
V C S S i m u l a t i o n R e p o r t
Time: 1000000000 ps
CPU Time: 16829.710 seconds; Data structure size: 99.9Mb
Thu Jan 27 20:19:50 2022
To reproduce:
/./simv +UVM_TESTNAME=ca_wd_bit_sel_ones_cover_test_c +ntb_random_seed=14382863 +UVM_VERBOSITY=UVM_LOW +AIB_IF_COUNT=1 +AIB_CONFIG_DIR=./ +AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat +AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat -l ./logs/sim_m2s2.log
GEN2_F2F_ALIGN_FLY1_1 also fails with the same timeout, here is the command to reproduce:
/M2S2_GEN2_F2F_ALIGN_FLY1_1/./simv +UVM_TESTNAME=ca_afly1_stb_incorrect_intv_test_c +ntb_random_seed=17373401 +UVM_VERBOSITY=UVM_LOW +AIB_IF_COUNT=1 +AIB_CONFIG_DIR=./ +AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat +AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat -l ./logs/sim_m2s2.log
Sameer analyzed and have a TB fix which will timeout earlier.
fixed DV issue in 0.9.7 release
fixed in 0.9.7