[0.9.6] CA M2S2_GEN2_F2F_22 test fails
nij-intel opened this issue · comments
UVM_INFO ./eximius/0.9.6/ca/dv/tb/../export_src/ca_scoreboard.sv(527) @ 2902000: uvm_test_top.ca_top_env.ca_scoreboard [verify_rx_dout] xfer_cnt: 238 DIE_B tx_din -- > AIB --> DIE_A rx_dout Pass
UVM_ERROR ./eximius/0.9.6/ca/dv/export_src/./ca_tx_tb_in_mon.sv(342) @ 2902500: uvm_test_top.ca_top_env.ca_die_a_tx_tb_in_agent.mon [mon_tx_tb_in] BAD case in is_stb
UVM_ERROR ./eximius/0.9.6/ca/dv/export_src/./ca_tx_tb_in_mon.sv(342) @ 2902500: uvm_test_top.ca_top_env.ca_die_b_tx_tb_in_agent.mon [mon_tx_tb_in] BAD case in is_stb
UVM_INFO ./eximius/0.9.6/ca/dv/tb/../export_src/ca_scoreboard.sv(527) @ 2902500: uvm_test_top.ca_top_env.ca_scoreboard [verify_rx_dout] xfer_cnt: 239 DIE_B tx_din -- > AIB --> DIE_A rx_dout Pass
drv_tfr_complete_ab 1
UVM_INFO ./eximius/0.9.6/ca/dv/tb/../export_src/ca_scoreboard.sv(527) @ 2903000: uvm_test_top.ca_top_env.ca_scoreboard [verify_rx_dout] xfer_cnt: 240 DIE_B tx_din -- > AIB --> DIE_A rx_dout Pass
UVM_INFO ./0.9.6/ca/dv/tb/../tests/ca_aln_err_afly0_by_incorrect_stb_test.sv(160) @ 2903000: uvm_test_top [ca_aln_err_afly0_by_incorrect_stb_test ::run_phase] after_1st drv_tfr_complete..
Command to reproduce:
./simv +UVM_TESTNAME=ca_aln_err_afly0_by_incorrect_stb_test_c +ntb_random_seed=13374881 +UVM_VERBOSITY=UVM_LOW +AIB_IF_COUNT=1 +AIB_CONFIG_DIR=./ +AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat +AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat -l ./logs/sim_m2s2.log
shared vpd and log files
CA DV issue addressed in 0.9.7 release
Still fails:
UVM_ERROR ./0.9.7/ca/dv/export_src/./ca_tx_tb_in_mon.sv(342) @ 3352500: uvm_test_top.ca_top_env.ca_die_b_tx_tb_in_agent.mon [mon_tx_tb_in] BAD case in is_stb
UVM_INFO ./0.9.7/ca/dv/tb/../export_src/ca_scoreboard.sv(522) @ 3352500: uvm_test_top.ca_top_env.ca_scoreboard [verify_rx_dout] xfer_cnt: 239 DIE_A tx_din -- > AIB --> DIE_B rx_dout Pass
- Report counts by severity
UVM_INFO : 1099
UVM_WARNING : 0
UVM_ERROR : 1
UVM_FATAL : 0
** Report counts by id
[AIB ENV CFG] 1
[CA_CFG] 14
[CHECK_PHASE] 1
[GLOBAL_TIMER] 2
[MASTER CFG] 8
[RESET DRV] 1
[RNTST] 1
[SLAVE CFG] 8
[TEST_DONE] 1
[UVMTOP] 2
[aib_master_data_monitor] 8
[aib_master_por_driver] 36
[aib_master_prog_default_sequence] 2
[aib_master_prog_driver] 1
[aib_slave_data_monitor] 16
[aib_slave_por_agent] 1
[aib_slave_por_agent build_phase ] 1
[aib_slave_por_driver] 54
[aib_slave_prog_driver] 32
[aib_vip_top] 1
[base_ca_test_c::build_phase] 2
[base_test] 2
[body] 6
[build_phase] 3
[ca_aln_err_afly0_by_incorrect_stb_test] 2
[ca_aln_err_afly0_by_incorrect_stb_test ::run_phase] 1
[ca_aln_err_afly0_by_incorrect_stb_test_c] 3
[ca_rx_tb_in_agent_c::new] 4
[ca_rx_tb_in_drv_c::new] 4
[ca_rx_tb_in_mon_c::new] 4
[ca_top_env_c::build_phase] 2
[ca_top_env_c::connect_phase] 2
[ca_tx_tb_in_agent_c::new] 4
[ca_tx_tb_in_mon_c::new] 4
[ca_tx_tb_out_agent_c::new] 4
[ca_tx_tb_out_drv_c::new] 4
[ca_tx_tb_out_mon_c::new] 4
[calc_stb_beat] 170
[chan_delay_agent_c::new] 48
[chan_delay_drv_c::new] 48
[chan_delay_mon_c::new] 48
[check_phase] 113
[ck_eot] 1
[ck_xfer_cnt] 2
[drv_reset] 1
[final_phase] 3
[gen_stb_beat] 6
[generate_stb_beat] 1
[intel_aib_base_test] 2
[intel_aib_init_base_test] 24
[mon_reset] 1
[mon_tx_tb_in] 1
[verify_rx_dout] 385
./simv +UVM_TESTNAME=ca_aln_err_afly0_by_incorrect_stb_test_c +ntb_random_seed=41142320 +UVM_VERBOSITY=UVM_LOW +AIB_IF_COUNT=1 +AIB_CONFIG_DIR=./ +AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat +AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat -l ./logs/ca_tb.log
A test rerun with mentioned seed in above latest reporting, still passed at Eximius on xcelium.
Could there be a possibility the way VCS handles this!
Please share failing log and waves.
Attached are our screenshots of passed test
extract from our log:
++++++++++++++++
/g/proj/customer/intel/ship/users/sameerkk/ship_rel/design/ca/dv/tb/ca_top_tb.sv
-top ca_top_tb
+UVM_TESTNAME=ca_aln_err_afly0_by_incorrect_stb_test_c
-l ca_tb.log
-f /g/proj/customer/intel/ship/users/sameerkk/ship_rel/design/ca/dv/../rtl/ca.f
++++++++++++++++
-svseed 41142320
User defined plus("+") options:
+UVM_VERBOSITY=UVM_LOW
+AIB_IF_COUNT=1
+AIB_TRANS_COUNT=120
+AIB_CONFIG_DIR=./
+AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat
+AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat
++++++++++++++++
/////////////////////////
// SvtTestEpilog: Test Passed //
/////////////////////////
UVM_INFO /g/proj/customer/intel/ship/users/sameerkk/ship_rel/design/aib/dv/tests/intel_aib_base_test.sv(303) @ 3369500: uvm_test_top [final_phase] Exiting...
UVM_INFO /g/tools/cadence/XCELIUMMAIN/20.09.001_Base/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_catcher.svh(705) @ 3369500: reporter [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Number of demoted UVM_FATAL reports : 0
Number of demoted UVM_ERROR reports : 0
Number of demoted UVM_WARNING reports: 0
Number of caught UVM_FATAL reports : 0
Number of caught UVM_ERROR reports : 0
Number of caught UVM_WARNING reports : 0
UVM_INFO /g/tools/cadence/XCELIUMMAIN/20.09.001_Base/tools/methodology/UVM/CDNS-1.2/sv/src/base/uvm_report_server.svh(847) @ 3369500: reporter [UVM/REPORT/SERVER]
--- UVM Report Summary ---
** Report counts by severity
UVM_INFO : 644
UVM_WARNING : 0
UVM_ERROR : 0
UVM_FATAL : 0
** Report counts by id
[AIB ENV CFG] 1
[CA_CFG] 14
[CHECK_PHASE] 1
[GLOBAL_TIMER] 2
fails in 0.9.8
UVM_INFO./eximius/0.9.8/ca/dv/export_src/./ca_tx_tb_out_drv.sv(493) @ 3369500: uvm_test_top.ca_top_env.ca_die_b_tx_tb_out_agent.drv [check_phase] Starting ca_tx_tb_out_drv check_phase...
UVM_INFO ./eximius/0.9.8/ca/dv/export_src/./ca_tx_tb_out_drv.sv(502) @ 3369500: uvm_test_top.ca_top_env.ca_die_b_tx_tb_out_agent.drv [check_phase] DIE_B ca_tx_tb_out_drv check_phase ok
UVM_INFO./eximius/0.9.8/ca/dv/tb/../export_src/ca_scoreboard.sv(572) @ 3369500: uvm_test_top.ca_top_env.ca_scoreboard [CHECK_PHASE] Starting scoreboard check_phase...
UVM_WARNING ./eximius/0.9.8/ca/dv/tb/../export_src/ca_scoreboard.sv(552) @ 3369500: uvm_test_top.ca_top_env.ca_scoreboard [check_queue] die_a_tx_din_q NOT empty: 1 first item:
UVM_INFO./eximius/0.9.8/ca/dv/tb/../export_src/ca_scoreboard.sv(557) @ 3369500: uvm_test_top.ca_top_env.ca_scoreboard [check_phase] die_b_tx_din_q empty: ok
UVM_INFO./eximius/0.9.8/ca/dv/tb/../export_src/ca_scoreboard.sv(557) @ 3369500: uvm_test_top.ca_top_env.ca_scoreboard [check_phase] die_a_exp_rx_dout_q empty: ok
UVM_INFO ./eximius/0.9.8/ca/dv/tb/../export_src/ca_scoreboard.sv(557) @ 3369500: uvm_test_top.ca_top_env.ca_scoreboard [check_phase] die_b_exp_rx_dout_q empty: ok
UVM_ERROR./eximius/0.9.8/ca/dv/tb/../export_src/ca_scoreboard.sv(583) @ 3369500: uvm_test_top.ca_top_env.ca_scoreboard [check_phase] >> FAIL << Please see above msg
to reproduce:
./eximius/0.9.8/ca/dv/nightly/M2S2_GEN2_F2F_22/./simv +UVM_TESTNAME=ca_aln_err_afly0_by_incorrect_stb_test_c +ntb_random_seed=55379391 +UVM_VERBOSITY=UVM_LOW +AIB_IF_COUNT=1 +AIB_CONFIG_DIR=./ +AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat +AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat -l ./logs/ca_t
sent log and VPD files
The log you sent shows passing sims with no UVM_ERROR messages. Looking at the above, the test you reported failing was M2S2_GEN2_F2F_22. You sent a filed labeled M2S2_GEN2_Q2Q_1.tgz. Did you send the wrong waves/files?
uploaded correct logs and VPD in M2S2_GEN2_F2F_22.tgz
This issue should be fixed in the Feb 18 release.
fixed in 1.0