AXILITE bready timeout
nij-intel opened this issue · comments
amba_svt/S-2021.06/axi_slave_svt/sverilog/src/vcs/svt_axi_base_slave_common.svp(9022) @ 18582000: uvm_test_top.axi_env.axi_system_env.slave[0] [wait_for_bready] {OBJECT_NUM('d100009) PORT_ID('d0) PORT_NAME(slave[0]) TYPE(WRITE) COHERENT_XACT_TYPE(WRITENOSNOOP) ID('h0) SECURE('d1) ADDR('h9a48667d) CACHE_TYPE('d0) START_TIME(7853000)} Timed out waiting for bready after bvalid assertion. Timeout = 'd10000 clock cycles Watchdog Timer = svt_axi_system_configuration::bready_watchdog_timeout, If the current timer value 'd 10000 clock cycles is not sufficient for the DUT to respond, increase the timeout variable svt_axi_system_configuration::bready_watchdog_timeout to match the maximum expected delay from DUT. To disable the timer, set svt_axi_system_configuration::bready_watchdog_timeout to zero. In this case, the VIP will indefinitely wait for the signal from DUT. If the signal is never received, it may result in simulation hang. This timeout might result in protocol violation errors as VIP assumes signal is not going to be recieved and proceeds with next beat, But if DUT sends it after some delay it might result in all sorts of protocol voilations
Command to reproduce:
0.9.3/llink/dv/aximm/regression/test_037__axilite_tb_mh2_sh2__rx_marker_loc_79/./simv +UVM_TESTNAME=random_wr_rd_test +ntb_random_seed=53617558 +UVM_VERBOSITY=UVM_NONE +UVM_MAX_QUIT_COUNT=5 +AIB_IF_COUNT=1 +AIB_CONFIG_DIR=./ +AIB_MASTER_CONFIG_FILE=./master_0_config_aib.dat +AIB_SLAVE_CONFIG_FILE=./slave_0_config_aib.dat -l ./logs/sim_random_wr_rd_test_m2s2.log -cm line+cond+tgl+fsm+branch+assert +nospecify +define+AXIMM_FLOWCNT
Will send vpd over to you
This seems to be due to a bad AIB interface. You can see in the attached waves that the 8 *transfer_en are all 1 for channel 0. However, none of the data which is being fed into the slave data_in_f is appearing on the master data_out_f.
I'll ask the question again, are you using the same AIB that is in the repo or are you using a local branch / variant?
With this update from aib-phy-hardware able to get the test passing
