Needs example design DV for all individual IPs. (No UVM env)
xinyang2k opened this issue · comments
axi4-st/full_examples/sims and axi4-mm/full_examples/sims has system verilog examples using AIB model
chipsalliance / aib-protocols
xinyang2k opened this issue · comments
axi4-st/full_examples/sims and axi4-mm/full_examples/sims has system verilog examples using AIB model